When I was cutting my teeth in high-speed PCB design some 25 years ago, speeds were slow, layer counts were low, dielectric constants and loss tangents were high, design margins were wide, copper roughness didn’t matter, and glass-weave styles didn’t matter. We called dielectrics “FR-4” and their properties didn’t matter much. A fast PCI bus…
Read MoreThe “founder” of TMI asks, How much is more analysis worth? Just because something can be done doesn’t mean that it should be done. A few customer encounters this past month caused an issue to ricochet around in my mind like a 1970s pinball machine. I’m referring to a trap we’ve all fallen into: analysis paralysis. Three interrelated definitions…
Read MoreA methodology for selecting the right material and the right price point. When I started writing this column a couple years ago, I wondered how much I’d have to say. An experienced media guy told me to watch my inbox for topics and questions that may be of general interest. That turned out to be…
Read MoreThe impedance implications of the trapezoidal trace. UNTIL RECENTLY I thought those who believed in rectangular traces were about as common as those who believe in square waves and a flat earth. Recently, though, I came to realize it’s not as clear as I thought, not only for newbies but in general. Over the past 25…
Read MoreWeight is still used as a determinant for copper thickness. Why? Sometimes my columns tie to issues or stackups that appear in my inbox each week. I’m occasionally asked why 0.6 mils (15µm) is often used for the thickness of 0.5-oz. copper, rather than 0.7 mils (18µm), and similarly why 1.2 mils (30µm) is often…
Read MoreTrace separation; length parallelism; stackup: Does one stand out? It’s been some time since I’ve seen an article on crosstalk, so I decided to take the opportunity to walk through the subject in a soup-to-nuts overview for those in the PCB design community who may be interested in why crosstalk-savvy PCB designers and hardware engineers…
Read MoreMost boards will work just fine. But what if they don’t? Over the past year, I’ve written a good bit about glass-weave skew (GWS) and next-generation loss requirements, using PCI Express guidelines as a means of tracking what higher frequencies do to eye patterns. This month, we’ll combine important elements of both these technology series,…
Read MoreWhen sourcing materials, consider dual-ply glass. Au: This column is a comprehensive follow-on to the July column introduction on glass-weave skew and the discussion in August and September of various mitigation strategies. With some overlap, these may be read together or independently. In my July article, Part One of a series on glass-weave skew, I introduced its causes…
Read MoreMitigation techniques and costs of designing around glass-weave skew. Au: This column is a comprehensive follow-on to the July column introduction on glass-weave skew and the discussion in August of various mitigation strategies. With some overlap, these may be read together or independently. In July, I introduced glass-weave skew causes and when or why a hardware designer…
Read MoreMitigation techniques and costs of designing around glass-weave skew. Au: This column is a comprehensive follow-on to the July column introduction on glass-weave skew. With some overlap, these may be read together or independently. In my July column, I introduced the causes of glass-weave skew (GWS) and when or why a hardware designer might care. In…
Read MoreZ-zero, based in
Redmond, Washington, develops
PCB stackup planning and
material-selection software
for electronic-system design.
